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to our customers, old company name in catalogs and other documents on april 1 st , 2010, nec electronics corporation merged with renesas technology corporation, and renesas electronics corporation took over all the business of both companies. therefore, although the old company name remains in this document, it is a valid renesas electronics document. we appreciate your understanding. renesas electronics website: http://www.renesas.com april 1 st , 2010 renesas electronics corporation issued by: renesas electronics corporation (http://www.renesas.com) send any inquiries to http://www.renesas.com/inquiry.
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the information contained in this document is being issued in advance of the production cycle for the product. the parameters for the product may change before final production or nec electronics corporation, at its own discretion, may withdraw the product prior to its production. not all products and/or types are availabe in every country. please check with an nec electronics sales representative for availability and additional information. 2007 mos integrated circuit pd78f9221cs, 78f9222cs 8-bit single-chip microcontroller document no. u18680ej1v0pm00 (1st edition) date published june 2007 ns cp(k) printed in japan preliminary product information the pd78f9221cs, 78f9222cs are 8-bit single-chip microcontrollers of the 78k0s series. these microcontrollers feature si ngle-voltage self-programming flas h memory and many peripherals. detailed function descriptions are provided in the following user's ma nuals. be sure to read them before designing. 78k0s/ka1+ user?s manual: u16898e 78k/0s series user's manual instruction: u11047e features { minimum instruction execution ti me selectable from high speed (0.2 s) to low speed (3.2 s) (with cpu clock of 10 mhz) { general-purpose registers: 8 bits 8 registers { rom and ram capacities item part number program memory (flash memory) memory (internal high-speed ram) pd78f9221cs 2 kb 128 bytes pd78f9222cs 4 kb 256 bytes { on-chip power-on clear (poc) circuit and low voltage detector (lvi) { on-chip watchdog timer (operable on internal low-speed internal oscillator clock) { i/o ports: 17 { timer: 4 channels ? 16-bit timer/event counter: 1 channel ? 8-bit timer: 2 channels ? watchdog timer: 1 channel { serial interface: uart (lin (local interconnect network) bus supported) 1 channel { 10-bit resolution a/d converter: 4 channels { supply voltage: v dd = 2.0 to 5.5 v note { operating tem perature range: t a = ? 40 to +85 c note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on clear (poc) circuit is 2.1 v 0.1 v.
preliminary product information u18680ej1v0pm00 2 pd78f9221cs, 78f9222cs applications automotive electronics, household appli ances, toys, and industrial equipment ordering information part number package pd78f9221cs-cac-a 20-pin plastic sdip (7.62 mm (300)) pd78f9222cs-cac-a 20-pin plastic sdip (7.62 mm (300)) remark products with -a at the end of t he part number are lead-free products.
preliminary product information u18680ej1v0pm00 3 pd78f9221cs, 78f9222cs overview of functions item pd78f9221cs pd78f9222cs flash memory 2 kb 4 kb internal memory high-speed ram 128 bytes 256 bytes memory space 64 kb x1 input clock (oscillation frequency) crystal/ceramic/external clock input: 10 mhz (v dd = 2.0 to 5.5 v) high speed (oscillation frequency) internal oscillation: 8 mhz (typ.) internal oscillation clock low speed (for tmh1 and wdt) internal oscillation: 240 khz (typ.) general-purpose registers 8 bits 8 registers instruction execution time 0.2 s/0.4 s/0.8 s/1.6 s/3.2 s (x1 input clock: f x = 10 mhz) i/o port total: 17 pins cmos i/o: 15 pins cmos input: 1 pin cmos output: 1 pin timer ? 16-bit timer/event counter: 1 channel ? 8-bit timer (timer h1): 1 channel ? 8-bit timer (timer 80): 1 channel ? watchdog timer: 1 channel timer output 2 pins (pwm: 1 pin) a/d converter 10-bit resolution 4 channels serial interface lin-bus-s upporting uart mode: 1 channel external 4 vectored interrupt sources internal 9 reset ? reset by reset pin ? internal reset by watchdog timer ? internal reset by power-on clear ? internal reset by low-voltage detector supply voltage v dd = 2.0 to 5.5 v note operating temperature range t a = ? 40 to +85 c package 20-pin plastic sdip note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on- clear (poc) circuit is 2.1 v 0.1 v.
preliminary product information u18680ej1v0pm00 4 pd78f9221cs, 78f9222cs pin configuration (top view) ? 20-pin plastic sdip v ss p121/x1 p122/x2 p123 v dd reset/p34 p31/ti010/to00/intp2 p30/ti000/intp0 p41/intp3 av ref p20/ani0 p21/ani1 p22/ani2 p23/ani3 p130 p45 p44/rxd6 p43/txd6/intp1 p42/toh1 p40 18 17 16 20 19 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 note in the pd78f9221cs, 78f9222cs, v ss functions alternately as the ground potential of the a/ d converter. be sure to connect v ss to a stabilized gnd (= 0 v). ani0 to ani3: analog input reset: reset av ref : analog reference voltage rxd6: receive data intp0 to intp3: external interr upt input ti000, ti010: timer input p20 to p23: port 2 to00, toh1: timer output p30, p31, p34: port 3 txd6: transmit data p40 to p45: port 4 v dd : power supply p121 to p123: port 12 v ss : ground p130: port 13 x1, x2: crystal oscillator (x1 input clock)
preliminary product information u18680ej1v0pm00 5 pd78f9221cs, 78f9222cs block diagram 78k0s cpu core internal high-speed ram flash memory v ss note v dd toh1/p42 port 2 p20 to p23 4 port 4 p40 to p45 6 port 13 p130 power on clear/ low voltage indicator poc/lvi control reset control port 3 p30, p31 2 p34 p121 to p123 3 port 12 system control high-speed internal oscillator reset/p34 x1/p121 x2/p122 low-speed internal oscillator intp0/p30 intp1/p43 intp2/p31 intp3/p41 ani0/p20 to ani3/p23 4 a/d converter av ref 8-bit timer 80 watchdog timer 8-bit timer h1 16-bit timer/event counter 00 to00/ti010/p31 ti000/p30 rxd6/p44 txd6/p43 serial interface uart6 interrupt control note in the pd78f9221cs, 78f9222cs, v ss functions alternately as the ground potential of the a/ d converter. be sure to connect v ss to a stabilized gnd (= 0 v).
preliminary product information u18680ej1v0pm00 6 pd78f9221cs, 78f9222cs contents 1. pin functions ................................................................................................................. ................. 7 1.1 port functions................................................................................................................. ............................ 7 1.2 non-port functions ............................................................................................................. ........................ 8 1.3 pin i/o circuits and conn ection of u nused pins ................................................................................. .... 9 2. electrical specifications (target) ................................................................................... 11 3. package drawing ............................................................................................................... ........ 23 appendix a. related documents ................................................................................................ .24
preliminary product information u18680ej1v0pm00 7 pd78f9221cs, 78f9222cs 1. pin functions 1.1 port functions pin name i/o function after reset alternate- function pin p20 to p23 i/o port 2. 4-bit i/o port. can be set to input or output mode in 1-bit units. an on-chip pull-up resistor can be connected by setting software. input ani0 to ani3 p30 ti000/intp0 p31 i/o can be set to input or output mode in 1- bit units. an on-chip pull-up resistor can be connected by setting software. input ti010/to00/ intp2 p34 input port 3 input only input reset p40 ? p41 intp3 p42 toh1 p43 txd6/intp1 p44 rxd6 p45 i/o port 4. 6-bit i/o port. can be set to input or output mode in 1-bit units. an on-chip pull-up resistor can be connected by setting software. input ? p121 x1 p122 x2 p123 i/o port 12. 3-bit i/o port. can be set to input or output mode in 1-bit units. an on-chip pull-up resistor c an be connected only to p123 by setting software. input ? p130 output port 13. 1-bit output-only port output ? caution the p121/x1 and p122/x2 pins are pulled down during reset.
preliminary product information u18680ej1v0pm00 8 pd78f9221cs, 78f9222cs 1.2 non-port functions pin name i/o function after reset alternate- function pin intp0 p30/ti000 intp1 p43/txd6 intp2 p31/ti010/to00 intp3 input external interrupt input for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified input p41 rxd6 input serial data input for asyn chronous serial interface input p44 txd6 output serial data output for asynch ronous serial interface input p43/intp1 ti000 external count clock input to 16-bit timer/event counter 00. capture trigger input to captur e registers (cr000 and cr010) of 16-bit timer/event counter 00 p30/intp0 ti010 input capture trigger input to captur e register (cr000) of 16-bit timer/event counter 00 input p31/to00/intp2 to00 output 16-bit timer/event counter 00 output input p31/ti010/intp2 toh1 output 8-bit timer h1 output input p42 ani0 to ani3 input analog input of a/d converter input p20 to p23 av ref ? reference voltage of a/d converter ? ? reset input system reset input ? p34 x1 input connection of crystal/ceramic resonator for system clock oscillation. external clock input ? p121 x2 ? connection of crystal/ceramic resonator for system clock oscillation. ? p122 v dd ? positive power supply ? ? v ss ? ground potential ? ? caution the p121/x1 and p122/x2 pins are pulled down during reset.
preliminary product information u18680ej1v0pm00 9 pd78f9221cs, 78f9222cs 1.3 pin i/o circuits and connection of unused pins table 1-1 shows i/o circuit type of eac h pin and the connections of unused pins. for the configuration of the i/o circuit of each type, refer to figure 1-1 . table 1-1. types of pin i/o circui ts and connection of unused pins pin name i/o circuit type i/o recommended connection of unused pin p20/ani0 to p23/ani3 11 input: independently connect to av ref or v ss via a resistor. output: leave open. p30/ti000/intp0 p31/ti010/to00/intp2 8-a i/o input: independently connect to v dd or v ss via a resistor. output: leave open. p34/reset 2 input connect to v dd via a resistor. p40 p41/intp3 p42/toh1 p43/txd6/intp1 p44/rxd6 p45 8-a input: independently connect to v dd or v ss via a resistor. output: leave open. p121/x1 p122/x2 16-b input: independently connect to v ss via a resistor. output: leave open. p123 8-a i/o input: independently connect to v dd or v ss via a resistor. output: leave open. p130 3-c output leave open. av ref ? input directly connect to v dd .
preliminary product information u18680ej1v0pm00 10 pd78f9221cs, 78f9222cs figure 1-1. pin i/o circuits in v dd p-ch n-ch data out data output disable av ref p-ch n-ch in/out av ref v ss p-ch n-ch + input enable - pull up enable v dd p-ch pull up enable data output disable v dd p-ch v dd p-ch in/out n-ch p-ch feedback cut-off x1, in/out x2, in/out osc enable data output disable v dd p-ch n-ch data output disable p-ch n-ch type 2 type 3-c type 8-a type 16-b type 11 schmitt-triggered input with hysteresis characteristics comparator v ss v ss v ss v ss v ss
preliminary product information u18680ej1v0pm00 11 pd78f9221cs, 78f9222cs 2. electrical specifications (target) these specifications are only target values, and may not be satisfied by mass-produced products. absolute maximum ratings (t a = 25 c ) parameter symbol conditions ratings unit v dd ? 0.3 to +6.5 v v ss ? 0.3 to +0.3 v supply voltage av ref ? 0.3 to v dd + 0.3 note v v i1 p30, p31, p34, p40 to p45, p121 to p123 ? 0.3 to v dd + 0.3 note v input voltage v i2 p20 to p23 ? 0.3 to av ref + 0.3 note and ? 0.3 to v dd + 0.3 note v output voltage v o ? 0.3 to v dd + 0.3 note v analog input voltage v an ? 0.3 to av ref + 0.3 note and ? 0.3 to v dd + 0.3 note v per pin ? 10.0 ma total of pins other than p20 to p23 ? 44.0 ma output current, high i oh total of p20 to p23 ? 44.0 ma per pin 20.0 ma output current, low i ol total of all pins 44.0 ma in normal operation mode operating ambient temperature t a during flash memory programming ? 40 to +85 c flash memory blank status ? 65 to +150 c storage temperature t stg flash memory progra mming already performed ? 40 to +125 c note must be 6.5 v or lower caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated valu es at which the product is on the verge of suffering physical damage , and therefore the product must be used under conditions that ensure that the absolute m aximum ratings are not exceeded. remark unless specified otherwise, t he characteristics of alternate-function pi ns are the same as those of port pins.
preliminary product information u18680ej1v0pm00 12 pd78f9221cs, 78f9222cs x1 oscillator characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note 1 , v ss = 0 v) resonator recommended circuit parameter conditions min. typ. max. unit ceramic resonator x2 x1 v ss c2 c1 oscillation frequency (f x ) note 2 2.0 10.0 mhz crystal resonator x2 x1 v ss c2 c1 oscillation frequency (f x ) note 2 2.0 10.0 mhz 2.7 v v dd 5.5 v 2.0 10.0 x1 input frequency (f x ) note 2 2.0 v v dd < 2.7 v 2.0 5.0 mhz 2.7 v v dd 5.5 v 0.045 0.25 external clock x1 x1 input high- /low-level width (t xh , t xl ) 2.0 v v dd < 2.7 v 0.09 0.25 s notes 1. use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on- clear (poc) circuit is 2.1 v 0.1 v. 2. indicates only oscillator c haracteristics. refer to ac characteristics for instruction execution time. caution when using the x1 oscillator, wire as follows in the area enclosed by the br oken lines in the above figures to avoid an adverse eff ect from wiring capacitance. ? keep the wiring length as short as possible. do not cross the wiring with the other signal lines. do not route the wiring near a signal line th rough which a high fluctuating current flows. always make the ground point of the osc illator capacitor the same potential as v ss . do not ground the capacitor to a ground patte rn through which a high current flows. do not fetch signals from the oscillator. remark for the resonator selection and oscillator constant, users are required to eit her evaluate the oscillation themselves or apply to the resonat or manufacturer for evaluation.
preliminary product information u18680ej1v0pm00 13 pd78f9221cs, 78f9222cs high-speed internal osc illator characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note 1 , v ss = 0 v) resonator parameter conditions min. typ. max. unit t a = ? 10 to +80 c 3 % oscillation frequency (f x = 8 mhz note 2 ) deviation 2.7 v v dd 5.5 v t a = ? 40 to +85 c 5 % high-speed internal oscillator oscillation frequency (f x ) note 2 2.0 v v dd < 2.7 v 5.5 mhz notes 1. use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on- clear (poc) circuit is 2.1 v 0.1 v. 2. indicates only oscillator c haracteristics. refer to ac characteristics for instruction execution time. low-speed internal osc illator characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note , v ss = 0 v) resonator parameter conditions min. typ. max. unit low-speed internal oscillator oscillation frequency (f rl ) 120 240 480 khz note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on-clear (poc) circuit is 2.1 v 0.1 v.
preliminary product information u18680ej1v0pm00 14 pd78f9221cs, 78f9222cs dc characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note , v ss = 0 v) (1/2) parameter symbol conditions min. typ. max. unit per pin 2.0 v v dd 5.5 v ?5 ma 4.0 v v dd 5.5 v ?25 ma i oh1 pins other than p20 to p23 total 2.0 v v dd < 4.0 v ?15 ma per pin 2.0 v av ref 5.5 v ?5 ma output current, high i oh2 p20 to p23 total 2.0 v av ref 5.5 v ?15 ma per pin 2.0 v v dd 5.5 v 10 ma 4.0 v v dd 5.5 v 30 ma output current, low i ol total of all pins 2.0 v v dd < 4.0 v 15 ma v ih1 p30, p31, p34, p40 to p45, p123 0.8v dd v dd v v ih2 p20 to p23 0.7av ref av ref v input voltage, high v ih3 p121, p122 0.8v dd v dd v v il1 p30, p31, p34, p40 to p45, p123 0 0.2v dd v v il2 p20 to p23 0 0.3av ref v input voltage, low v il3 p121, p122 0 0.2v dd v total of pins other than p20 to p23 i oh1 = ?15 ma 4.0 v v dd 5.5 v i oh1 = ?5 ma v dd ? 1.0 v v oh1 i oh1 = ?100 a 2.0 v v dd < 4.0 v v dd ? 0.5 v total of pins p20 to p23 i oh2 = ?10 ma 4.0 v av ref 5.5 v i oh2 = ?5 ma av ref ? 1.0 v output voltage, high v oh2 2.0 v av ref < 4.0 v i oh2 = ?100 a av ref ? 0.5 v total of pins i ol = 30 ma 4.0 v v dd 5.5 v i ol = 10 ma 1.3 v output voltage, low v ol 2.0 v v dd 4.0 v i ol = 400 a 0.4 v input leakage current, high i lih1 v i = v dd pins other than x1 1 a input leakage current, low i lil1 v i = 0 v pins other than x1 ?1 a output leakage current, high i loh v o = v dd pins other than x2 1 a output leakage current, low i lol v o = 0 v pins other than x2 ?1 a pull-up resistance r pu v i = 0 v 10 30 100 k ? pull-down resistance r pd p121, p122, reset status 10 30 100 k ? note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on-clear (poc) circuit is 2.1 v 0.1 v. remark unless specified otherwise, t he characteristics of alternate-function pi ns are the same as those of port pins.
preliminary product information u18680ej1v0pm00 15 pd78f9221cs, 78f9222cs dc characteristics (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note 1 , v ss = 0 v) (2/2) parameter symbol conditions min. typ. max. unit when a/d converter is stopped 6.1 12.2 f x = 10 mhz v dd = 5.0 v 10% note 4 when a/d converter is operating note 8 7.6 15.2 ma when a/d converter is stopped 5.5 11.0 f x = 6 mhz v dd = 5.0 v 10% note 4 when a/d converter is operating note 8 14.0 ma when a/d converter is stopped 3.0 6.0 i dd1 note 3 crystal/ceramic oscillation, external clock input oscillation operating mode note 6 f x = 5 mhz v dd = 3.0 v 10% note 5 when a/d converter is operating note 8 4.5 9.0 ma when peripheral functions are stopped 1.7 3.8 f x = 10 mhz v dd = 5.0 v 10% note 4 when peripheral functions are operating 6.7 ma when peripheral functions are stopped 1.3 3.0 f x = 6 mhz v dd = 5.0 v 10% note 4 when peripheral functions are operating 6.0 ma when peripheral functions are stopped 0.48 1 i dd2 crystal/ceramic oscillation, external clock input halt mode note 6 f x = 5 mhz v dd = 3.0 v 10% note 5 when peripheral functions are operating 2.1 ma when a/d converter is stopped 5.0 10.0 i dd3 note 3 high-speed internal oscillation operating mode note 7 f x = 8 mhz v dd = 5.0 v 10% note 4 when a/d converter is operating note 8 6.5 13.0 ma when peripheral functions are stopped 1.4 3.2 i dd4 high-speed internal oscillation halt mode note 7 f x = 8 mhz v dd = 5.0 v 10% note 4 when peripheral functions are operating 5.9 ma when low-speed internal oscillation is stopped 3.5 20.0 v dd = 5.0 v 10% when low-speed internal oscillation is operating 17.5 32.0 a when low-speed internal oscillation is stopped 3.5 15.5 supply current note 2 i dd5 stop mode v dd = 3.0 v 10% when low-speed internal oscillation is operating 11.0 26.0 a notes 1. use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on- clear (poc) circuit is 2.1 v 0.1 v. 2. total current flowing through the internal power supply (v dd ). peripheral operation current is included (however, the current that fl ows through the pull-up resistor s of ports is not included). 3. these currents include peri pheral operation currents. 4. when the processor clock control register (pcc) is set to 00h. 5. when the processor clock control register (pcc) is set to 02h. 6. when crystal/ceramic oscillation clock, external clo ck input is selected as the system clock source using the option byte. 7. when the high-speed internal oscillation clock is se lected as the system clock source using the option byte. 8. the current that flows through the av ref pin is included.
preliminary product information u18680ej1v0pm00 16 pd78f9221cs, 78f9222cs ac characteristics (1) basic operation (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note 1 , v ss = 0 v) parameter symbol conditions min. typ. max. unit 4.0 v v dd 5.5 v 0.2 16 s 3.0 v v dd < 4.0 v 0.33 16 s 2.7 v v dd < 3.0 v 0.4 16 s crystal/ceramic oscillation clock, external clock input 2.0 v v dd < 2.7 v 1 16 s 4.0 v v dd 5.5 v 0.23 4.22 s 2.7 v v dd < 4.0 v 0.47 4.22 s cycle time (minimum instruction execution time) t cy high-speed internal oscillation clock 2.0 v v dd < 2.7 v 0.95 4.22 s 4.0 v v dd 5.5 v 2/fsam+ 0.1 note 2 s ti000 input high-level width, low-level width t tih , t til 2.0 v v dd < 4.0 v 2/fsam+ 0.2 note 2 s interrupt input high-level width, low-level width t inth , t intl 1 s reset input low-level width t rsl 2 s notes 1. use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on- clear (poc) circuit is 2.1 v 0.1 v. 2. selection of fsam = f xp , f xp /4, or f xp /256 is possible using bits 0 and 1 (prm000, prm001) of prescaler mode register 00 (prm00). note that when selecting the ti000 valid edge as the count clock, fsam = f xp . cpu clock frequency, pe ripheral clock frequency parameter conditions cpu clock (f cpu ) peripheral clock (f xp ) 4.0 v v dd 5.5 v 125 khz f cpu 10 mhz 3.0 v v dd < 4.0 v 125 khz f cpu 6 mhz 2.7 v v dd < 3.0 v 125 khz f cpu 5 mhz 500 khz f xp 10 mhz ceramic resonator, crystal resonator, external clock 2.0 v v dd < 2.7 v note 125 khz f cpu 2 mhz 500 khz f xp 5 mhz 4.0 v v dd 5.5 v 500 khz (typ.) f cpu 8 mhz (typ.) 2.7 v v dd < 4.0 v 500 khz (typ.) f cpu 4 mhz (typ.) 2 mhz (typ.) f xp 8 mhz (typ.) high-speed internal oscillator 2.0 v v dd < 2.7 v note 500 khz (typ.) f cpu 2 mhz (typ.) 2 m hz (typ.) f xp 4 mhz (typ.) note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on-clear (poc) circuit is 2.1 v 0.1 v.
preliminary product information u18680ej1v0pm00 17 pd78f9221cs, 78f9222cs t cy vs. v dd (crystal/ceramic oscillation clock, external clock input) supply voltage v dd [v] 123456 0.1 0.4 1.0 10 60 cycle time t cy [ s] guaranteed operation range 0.33 2.7 5.5 16 t cy vs. v dd (high-speed internal oscillation clock) 123456 0.1 1.0 10 60 2.7 5.5 0.23 4.22 0.47 0.95 supply voltage v dd [v] cycle time t cy [ s] guaranteed operation range
preliminary product information u18680ej1v0pm00 18 pd78f9221cs, 78f9222cs (2) serial interface (t a = ? 40 to +85 c, v dd = 2.0 to 5.5 v note , v ss = 0 v) uart mode (uart6, dedicated baud rate generator output) parameter symbol conditions min. typ. max. unit transfer rate 312.5 kbps note use this product in a voltage range of 2. 2 to 5.5 v because the detection voltage (v poc ) of the power-on-clear (poc) circuit is 2.1 v 0.1 v. ac timing test points (excluding x1 input) 0.8v dd 0.2v dd 0.8v dd 0.2v dd test points clock timing 1/f x t xl t xh x1 input ti000 timing t til t tih ti000 interrupt input timing intp0 to intp3 t intl t inth reset input timing reset t rsl
preliminary product information u18680ej1v0pm00 19 pd78f9221cs, 78f9222cs a/d converter characteristics (t a = ? 40 to +85 c, 2.7 v av ref v dd 5.5 v, v ss = 0 v note 1 ) parameter symbol conditions min. typ. max. unit resolution 10 10 10 bit 4.0 v av ref 5.5 v 0.2 0.4 %fsr overall error notes 2, 3 ainl 2.7 v av ref < 4.0 v 0.3 0.6 %fsr 4.5 v av ref 5.5 v 3.0 100 s 4.0 v av ref < 4.5 v 4.8 100 s 2.85 v av ref < 4.0 v 6.0 100 s conversion time t conv 2.7 v av ref < 2.85 v 14.0 100 s 4.0 v av ref 5.5 v 0.4 %fsr zero-scale error notes 2, 3 ezs 2.7 v av ref < 4.0 v 0.6 %fsr 4.0 v av ref 5.5 v 0.4 %fsr full-scale error notes 2, 3 efs 2.7 v av ref < 4.0 v 0.6 %fsr 4.0 v av ref 5.5 v 2.5 lsb integral non-linearity error note 2 ile 2.7 v av ref < 4.0 v 4.5 lsb 4.0 v av ref 5.5 v 1.5 lsb differential non-linearity error note 2 dle 2.7 v av ref < 4.0 v 2.0 lsb analog input voltage v ain v ss note 1 av ref v notes 1. in the 78k0s/ka1+, v ss functions alternately as the ground potential of the a/d converter. be sure to connect v ss to a stabilized gnd (= 0 v). 2. excludes quantization error ( 1/2 lsb). 3. this value is indicated as a rati o (%fsr) to the full-scale value. caution the conversion accuracy may be degraded when the analog input pin is used as an alternate i/o port or if a port is cha nged during a/d conversion.
preliminary product information u18680ej1v0pm00 20 pd78f9221cs, 78f9222cs poc circuit characteristics (t a = ? 40 to +85 c) parameter symbol conditions min. typ. max. unit detection voltage v poc 2.0 2.1 2.2 v power supply boot time t pth v dd : 0 v 2.1 v 1.5 s response delay time 1 note 1 t pthd when power supply rises, after reaching detection voltage (max.) 3.0 ms response delay time 2 note 2 t pd when power supply falls 1.0 ms minimum pulse width t pw 0.2 ms notes 1. time required from voltage detection to internal reset release. 2. time required from voltage detection to internal reset signal generation. poc circuit timing supply voltage (v dd ) detection voltage (min.) detection voltage (typ.) detection voltage (max.) t pth t pthd t pw t pd time
preliminary product information u18680ej1v0pm00 21 pd78f9221cs, 78f9222cs lvi circuit characteristics (t a = ? 40 to +85 c) parameter symbol conditions min. typ. max. unit v lvi0 4.1 4.3 4.5 v v lvi1 3.9 4.1 4.3 v v lvi2 3.7 3.9 4.1 v v lvi3 3.5 3.7 3.9 v v lvi4 3.3 3.5 3.7 v v lvi5 3.15 3.3 3.45 v v lvi6 2.95 3.1 3.25 v v lvi7 2.7 2.85 3.0 v v lvi8 2.5 2.6 2.7 v detection voltage v lvi9 2.25 2.35 2.45 v response time note 1 t ld 0.2 2.0 ms minimum pulse width t lw 0.2 ms operation stabilization wait time note 2 t lwait 0.1 0.2 ms notes 1. time required from voltage detection to interr upt output or internal reset signal generation. 2. time required from setting lvion to 1 to operation stabilization. remarks 1. v lvi0 > v lvi1 > v lvi2 > v lvi3 > v lvi4 > v lvi5 > v lvi6 > v lvi7 > v lvi8 > v lvi9 2. v poc < v lvim (m = 0 to 9) lvi circuit timing supply voltage (v dd ) detection voltage (min.) detection voltage (typ.) detection voltage (max.) t lw t ld t lwait lvion 1 time data memory stop mode low supply vo ltage data retention characteristics (t a = ? 40 to +85 c) parameter symbol conditions min. typ. max. unit data retention supply voltage v dddr 2.0 5.5 v release signal set time t srel 0 s
preliminary product information u18680ej1v0pm00 22 pd78f9221cs, 78f9222cs flash memory programming characteristics (t a = ?40 to +85 c, 2.7 v v dd 5.5 v, v ss = 0 v) parameter symbol conditions min. typ. max. unit supply current i dd v dd = 5.5 v 7.0 ma erasure count note 1 (per 1 block) n erase t a = ? 40 to +85 c 1000 times 4.5 v v dd 5.5 v 0.8 s 3.5 v v dd < 4.5 v 1.0 s t a = ? 10 to +85 c, n erase 100 2.7 v v dd < 3.5 v 1.2 s 4.5 v v dd 5.5 v 4.8 s 3.5 v v dd < 4.5 v 5.2 s t a = ? 10 to +85 c, n erase 1000 2.7 v v dd < 3.5 v 6.1 s 4.5 v v dd 5.5 v 1.6 s 3.5 v v dd < 4.5 v 1.8 s t a = ? 40 to +85 c, n erase 100 2.7 v v dd < 3.5 v 2.0 s 4.5 v v dd 5.5 v 9.1 s 3.5 v v dd < 4.5 v 10.1 s chip erase time t cerase t a = ? 40 to +85 c, n erase 1000 2.7 v v dd < 3.5 v 12.3 s 4.5 v v dd 5.5 v 0.4 s 3.5 v v dd < 4.5 v 0.5 s t a = ? 10 to +85 c, n erase 100 2.7 v v dd < 3.5 v 0.6 s 4.5 v v dd 5.5 v 2.6 s 3.5 v v dd < 4.5 v 2.8 s t a = ? 10 to +85 c, n erase 1000 2.7 v v dd < 3.5 v 3.3 s 4.5 v v dd 5.5 v 0.9 s 3.5 v v dd < 4.5 v 1.0 s t a = ? 40 to +85 c, n erase 100 2.7 v v dd < 3.5 v 1.1 s 4.5 v v dd 5.5 v 4.9 s 3.5 v v dd < 4.5 v 5.4 s block erase time t berase t a = ? 40 to +85 c, n erase 1000 2.7 v v dd < 3.5 v 6.6 s byte write time t write t a = ? 40 to +85 c, n erase 1000 150 s per 1 block 6.8 ms internal verify t verify per 1 byte 27 s blank check t blkchk per 1 block 480 s retention years t a = 85 c note 2 , n erase 1000 10 years notes 1. depending on the erasure count (n erase ), the erase time varies. refer to the chip erase time and block erase time parameters. 2. when the average temperature when operating and not operating is 85 c. remark when a product is first written after shipment, ?erase write? and ?write only? ar e both taken as one rewrite.
preliminary product information u18680ej1v0pm00 23 pd78f9221cs, 78f9222cs 3. package drawing 20-pin plastic sdip (7.62mm (300)) item dimensions d c l x z 0 to 5 p20cs-70-cac z a2 a b b1 17.57 max. 6.60 3.70 max. 0.65 2.80 1.778 7.62 0.10 0.52 0.10 1.02 0.10 b2 0.77 0.10 0.27 0.07 2.86 0.25 0.609 0.20 20 11 1 10 m a1 x b1 b2 b c a b e a a1 a2 d e l (unit:mm) e e e1 a b c e1 c nec electronics corporation 2007
preliminary product information u18680ej1v0pm00 24 pd78f9221cs, 78f9222cs appendix a. related documents the related documents indicated in th is publication may include preliminary versions. however, preliminary versions are not marked as such. documents related to devices document name document no. pd78f9221cs, 78f9222cs preliminary pr oduct information this manual 78k0s/ka1+ user?s manual u16898e 78k/0s series instructions user?s manual u11047e documents related to developmen t software tools (user?s manuals) document name document no. operation u16656e language u14877e ra78k0s assembler package structured assembly language u11623e operation u16654e cc78k0s c compiler language u14872e id78k0s-ns ver. 2.52 integrated debugger operation u16584e id78k0s-qb ver. 2.81 integrated debugger operation u17287e pm plus ver. 5.20 u16934e documents related to development hardware tools (user?s manuals) document name document no. ie-78k0s-ns in-circuit emulator u13549e ie-78k0s-ns-a in-circuit emulator u15207e qb-78k0skx1mini in-circuit emulator u17272e qb-78k0skx1 in-circuit emulator u18219e qb-mini2 on-chip debug emulator with programming function u18371e documents related to flash me mory writing (u ser?s manuals) document name document no. pg-fp4 flash memory programmer u15260e pg-fpl2 flash memory programmer u17307e caution the related docum ents listed above are subject to change without notice. be sure to use the latest version of each document for designing.
preliminary product information u18680ej1v0pm00 25 pd78f9221cs, 78f9222cs other related documents document name document no. semiconductor selection guide - products and packages - x13769x semiconductor device mount manual note quality grades on nec semiconductor devices c11531e nec semiconductor device reliability/quality control system c10983e guide to prevent damage for semiconductor devi ces by electrostatic discharge (esd) c11892e note see the ?semiconductor device mount manual? webs ite (http://www.necel.com/pkg/en/mount/index.html). caution the related docum ents listed above are subject to change without notice. be sure to use the latest version of each document for designing.
preliminary product information u18680ej1v0pm00 26 pd78f9221cs, 78f9222cs 1 2 3 4 voltage application waveform at input pin waveform distortion due to input noise or a reflected wave may cause malfunction. if the input of the cmos device stays in the area between v il (max) and v ih (min) due to noise, etc., the device may malfunction. take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between v il (max) and v ih (min). handling of unused input pins unconnected cmos device inputs can be cause of malfunction. if an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd via a resistor if there is a possibility that it will be an output pin. all handling related to unused pins must be judged separately for each device and according to related specifications governing the device. precaution against esd a strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. environmental control must be adequate. when it is dry, a humidifier should be used. it is recommended to avoid using insulators that easily build up static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work benches and floors should be grounded. the operator should be grounded using a wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with mounted semiconductor devices. status before initialization power-on does not necessarily define the initial status of a mos device. immediately after the power source is turned on, devices with reset functions have not yet been initialized. hence, power-on does not guarantee output pin levels, i/o settings or contents of registers. a device is not initialized until the reset signal is received. a reset operation must be executed immediately after power-on for devices with reset functions. power on/off sequence in the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on the external power supply after switching on the internal power supply. when switching the power supply off, as a rule, switch off the external power supply and then the internal power supply. use of the reverse power on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. the correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. input of signal during power off state do not input signals or an i/o pull-up power supply while the device is not powered. the current injection that results from input of such a signal or i/o pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. input of signals during the power off state must be judged separately for each device and according to related specifications governing the device. notes for cmos devices 5 6
preliminary product information u18680ej1v0pm00 27 pd78f9221cs, 78f9222cs superflash is a registered trademark of silicon st orage technology, inc. in several countries including the united states and japan. caution: this product uses superflash ? technology licensed from s ilicon storage technology, inc. the information contained in this document is being issued in advance of the production cycle for the product. the parameters for the product may change before final production or nec electronics corporation, at its own discretion, may withdraw the product prior to its production. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of an nec electronics products depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. ? ? ? ? ? ? ? m5d 02. 11-1 the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) (1) (2) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. "standard": "special": "specific":
pd78f9221cs, 78f9222cs nec electronics corporation 1753, shimonumabe, nakahara-ku, kawasaki, kanagawa 211-8668, japan tel: 044-435-5111 http://www.necel.com/ [america] nec electronics america, inc. 2880 scott blvd. santa clara, ca 95050-2554, u.s.a. tel: 408-588-6000 800-366-9782 http://www.am.necel.com/ [asia & oceania] nec electronics (china) co., ltd 7th floor, quantum plaza, no. 27 zhichunlu haidian district, beijing 100083, p.r.china tel: 010-8235-1155 http://www.cn.necel.com/ shanghai branch room 2509-2510, bank of china tower, 200 yincheng road central, pudong new area, shanghai, p.r.china p.c:200120 tel:021-5888-5400 http://www.cn.necel.com/ shenzhen branch unit 01, 39/f, excellence times square building, no. 4068 yi tian road, futian district, shenzhen, p.r.china p.c:518048 tel:0755-8282-9800 http://www.cn.necel.com/ nec electronics hong kong ltd. unit 1601-1613, 16/f., tower 2, grand century place, 193 prince edward road west, mongkok, kowloon, hong kong tel: 2886-9318 http://www.hk.necel.com/ nec electronics taiwan ltd. 7f, no. 363 fu shing north road taipei, taiwan, r. o. c. tel: 02-8175-9600 http://www.tw.necel.com/ nec electronics singapore pte. ltd. 238a thomson road, #12-08 novena square, singapore 307684 tel: 6253-8311 http://www.sg.necel.com/ nec electronics korea ltd. 11f., samik lavied?or bldg., 720-2, yeoksam-dong, kangnam-ku, seoul, 135-080, korea tel: 02-558-3737 http://www.kr.necel.com/ for further information, please contact: g0706 [europe] nec electronics (europe) gmbh arcadiastrasse 10 40472 dsseldorf, germany tel: 0211-65030 http://www.eu.necel.com/ hanover office podbielskistrasse 166 b 30177 hannover tel: 0 511 33 40 2-0 munich office werner-eckert-strasse 9 81829 mnchen tel: 0 89 92 10 03-0 stuttgart office industriestrasse 3 70565 stuttgart tel: 0 711 99 01 0-0 united kingdom branch cygnus house, sunrise parkway linford wood, milton keynes mk14 6np, u.k. tel: 01908-691-133 succursale fran?aise 9, rue paul dautier, b.p. 52 78142 velizy-villacoublay cdex france tel: 01-3067-5800 sucursal en espa?a juan esplandiu, 15 28007 madrid, spain tel: 091-504-2787 tyskland filial t?by centrum entrance s (7th floor) 18322 t?by, sweden tel: 08 638 72 00 filiale italiana via fabio filzi, 25/a 20124 milano, italy tel: 02-667541 branch the netherlands steijgerweg 6 5616 hs eindhoven the netherlands tel: 040 265 40 10

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